The current 66 MHz PCI (Peripheral Component Interconnect) architecture definition is somewhat limited in the amount of the "fan-out" relative to the number of slots for devices as well as the physical length of the bus. The 66 MHz PCI bus specification as published will allow up to 2 "slots", which is the equivalent of five "loads" counting the PCI bridge as a load. A "load" is a PCI device which is soldered to the bus while a "slot" is a mechanism by which a PCI device is selectively engaged with and connected to the bus. In accordance with the PCI specification, the PCI bus is capable of supporting five "loads" or up to two "slots".
The 66 MHz PCI bus is designed to run at 66 MHz but will operate at only 33 MHz whenever a 33 MHz device or adapter card is installed on the bus. However, the PCI bus bandwidth will support more 33 MHz devices when running at 33 MHz. Therefore the need exists for a means to allow more than two slots for a 66 MHz capable PCI bus segment, when the bus is operated at only 33 MHz.